Wyoming Patent of the Month – February 2022
Complementary metal–oxide–semiconductor (CMOS) logic integrated circuits (IC) use both p and n-type metal oxide transistors to achieve a combination of high performance and low power. These traditional designs use unipolar logic with just these NMOS and PMOS transistors to reduce the cost of manufacturing. Unfortunately, these methods need high stand-by power and have limited their use on a large scale.
The traditional design methods reduced costs and improved performance by porting the circuit design to smaller feature sizes. While this worked for a while, reducing costs and increasing computer power, most industry experts feel that this method has reached its cap. The cost of implementing such tiny transistors is now a costly process, requiring special tools and skills. For these reasons, Tacho Holdings, LLC has experimented with other methods to continue improving density and performance while improving pricing, including a vertical construction method. Their vertical construction stacks multiple dies rather than requiring the monolithic fabrication of 3D circuits.
This alternative to conventional silicon circuitry provides low stand-by power, high speed performance, and higher density. Their design has semiconductor columns and conductive columns. Capacitors are used to enable a precharge state and maintain this high voltage gate output. A clocked gate is then integrated, preventing any voltage drop.
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