In the context of the Oregon Research and Development (R&D) tax credit for semiconductors, a business component refers to any product, process, computer software, technique, formula, or invention that is held for sale, lease, or license, or used in the taxpayer’s trade or business. It serves as the fundamental unit of analysis for the four-part test, requiring that research activities be tied to the development or improvement of functionality, performance, reliability, or quality of that specific discrete element.

The introduction of the Oregon Research and Development Tax Credit for Semiconductors (ORS 315.518) represents a pivotal shift in the state’s fiscal strategy to maintain its status as a global hub for semiconductor innovation. By targeting the “business component” as the nucleus of credit eligibility, Oregon law necessitates a highly granular approach to research documentation. This requirement mandates that taxpayers move beyond broad project categorizations and instead isolate the technical uncertainties and experimental processes inherent in each distinct technological asset. The credit, available for tax years beginning on or after January 1, 2024, specifically addresses the high capital expenditures and long development cycles characteristic of the semiconductor industry, providing a 15 percent credit on excess qualified research expenses (QREs) over a historical base.

The Statutory and Regulatory Architecture of the Oregon Semiconductor Credit

The Oregon Legislative Assembly enacted House Bill 2009 in July 2023, establishing a targeted incentive framework to replace the state’s general R&D tax credit that expired in 2017. This new regime, codified under ORS 315.518 through 315.522, is designed with a specific industrial focus: the semiconductor sector. The law integrates federal standards from Internal Revenue Code (IRC) § 41, but introduces significant local modifications regarding eligibility, certification, and the definition of a “Qualified Semiconductor Company”.

Defining the Qualified Semiconductor Company

A critical threshold requirement for Oregon’s credit is the status of the taxpayer. Under ORS 315.518(1), a “Qualified Semiconductor Company” (QSC) is defined as an entity whose primary business involves the research, design, development, fabrication, assembly, testing, packaging, or validation of semiconductors. This primary business requirement ensures that the fiscal benefits of the credit are concentrated within the core semiconductor ecosystem rather than being diluted across general technology firms.

In 2025, the legislature expanded this definition via House Bill 2095 to include entities primarily engaged in the creation of semiconductor manufacturing equipment, semiconductor core intellectual property (IP), or electronic design automation (EDA) software. This expansion acknowledges the high degree of interdependence within the chip industry, where the “business component” under development might not be a physical chip, but rather the sophisticated software tools used to design next-generation architectures or the precision hardware used in the fabrication process.

The Business Component as a Discrete Unit of Analysis

The technical foundation of the credit rests on the concept of the business component as defined in IRC § 41(d)(2)(B). For tax purposes, the four-part test for qualified research must be applied separately to each business component. This prevents a taxpayer from claiming credits for an entire project if only certain elements of that project meet the qualification criteria. In the event that a project as a whole fails the test, the “shrink-back” rule allows the taxpayer to evaluate smaller, discrete sub-elements of the component until a qualifying portion is identified.

In the semiconductor context, the six recognized types of business components are applied with specific technical rigor:

1. Product: The physical integrated circuit or microchip intended for sale, such as a field-programmable gate array (FPGA) or a central processing unit (CPU).
2. Process: The methodology used in manufacturing, such as a new deposition technique or a chemical-mechanical planarization (CMP) process.
3. Computer Software: Internal-use software for fabrication management or EDA tools sold to other firms.
4. Technique: Specialized industrial methods, such as a novel way of reducing electromagnetic interference in high-speed chip packaging.
5. Formula: Chemical compositions used in photoresists or doping agents.
6. Invention: Novel architectures or hardware components that are typically subject to patent applications.

Local Revenue Office Guidance and the Application of the Law

The Oregon Department of Revenue (DOR) and the Oregon Business Development Department (Business Oregon) maintain a dual-agency oversight system for the semiconductor R&D credit. While Business Oregon oversees the certification of the taxpayer and the credit amount, the DOR manages the tax filing process and the verification of expenditures through Schedule OR-RESEARCH.

Certification and Registration Requirements

Unlike the federal R&D tax credit, which is claimed directly on a tax return, the Oregon semiconductor credit requires a two-step certification process. Taxpayers must first register with Business Oregon and then apply annually for a certification that validates their status as a QSC and approves the estimated credit amount.

The certification application is rigorous and must include a detailed narrative describing how the proposed research and development activities will support a trade or business directly related to semiconductors. Furthermore, the application requires an attestation of the taxpayer’s expected QREs and basic research payments, supported by internal financial projections. A $3,000 fee is required for each annual application.

The statewide annual cap is a critical constraint. If the total credit amount requested across all applications exceeds the available cap ($38.25 million for 2025), Business Oregon will reduce certified credit amounts that exceed $200,000 by a ratio necessary to keep the total within limits. This mechanism highlights the competitive nature of the incentive and the importance of early and accurate application filings.

Oregon-Specific Adjustments to Federal Calculations

OAR 150-315-0195 provides the DOR’s framework for calculating the credit, importing federal definitions with several significant modifications. First, “qualified research expenses” are limited to the sum of in-house research expenses and contract research expenses for research conducted specifically in Oregon. Federal calculations often include research conducted across multiple states, but the Oregon credit enforces a strict geographic nexus.

Second, the definition of “gross receipts” for purposes of the base amount calculation is modified to mean the total sales of the taxpayer in Oregon, as determined by the state’s apportionment statutes (ORS 314.665). If a taxpayer uses a non-standard apportionment method, Oregon sales are defined as per OAR 150-317-0170. This ensures that the credit is proportional to the taxpayer’s economic presence in the state rather than their global revenue.

The Four-Part Test for Business Component Qualification

The core of the “business component” requirement is the successful navigation of the IRS’s four-part test, which Oregon law adopts to verify that activities constitute “qualified research”.

The Business Component Test (Permitted Purpose)

The research must be conducted with the intent to develop a new or improved business component or to enhance the functionality, performance, reliability, or quality of an existing one. In the semiconductor industry, this might include activities like reducing the heat dissipation of a processor, increasing the storage density of a NAND flash memory chip, or improving the signal-to-noise ratio of an analog sensor.

Activities related to style, taste, or cosmetic factors are expressly excluded. For example, a semiconductor company that redesigns the plastic casing of a microchip purely for aesthetic purposes would not qualify, whereas a redesign intended to protect the chip from radiation or electromagnetic interference would meet the functional requirement of the permitted purpose test.

Elimination of Uncertainty Test

The taxpayer must demonstrate that the research was undertaken to eliminate technical uncertainty regarding the development or improvement of the business component. Uncertainty exists if the information available to the taxpayer at the project’s inception does not establish the capability of achieving the result, the method for achieving it, or the appropriate design of the final product.

In advanced lithography, for instance, a fabrication facility may be certain they have the capability to print a circuit, but the method of maintaining wafer throughput at sub-5nm nodes or the appropriate design of the optical mask may be highly uncertain. The resolution of these specific technical unknowns constitutes the qualified research activity.

Process of Experimentation Test

The law requires that “substantially all” (interpreted as 80 percent or more) of the research activities constitute elements of a process of experimentation. This process must involve the systematic evaluation of alternatives through modeling, simulation, or trial-and-error testing.

For semiconductor designers, this involves iterative cycles of circuit simulation, FPGA prototyping, and physical “bring-up” testing of early silicon samples. If the development process is linear and predictable—meaning the path from design to production follows established routines without the testing of multiple hypotheses—it may fail this test.

Technological in Nature Test

The process of experimentation must fundamentally rely on the principles of the physical or biological sciences, engineering, or computer science. Semiconductor R&D is deeply rooted in these “hard sciences,” involving quantum physics, materials science (e.g., silicon carbide or gallium nitride), and electrical engineering.

Research based on social sciences, humanities, or business management techniques (such as efficiency surveys or market research) is explicitly excluded.

Mathematical Mechanics: Calculating the Oregon Semiconductor Credit

The Oregon credit is calculated using a formula that targets the “increase” in research spending, incentivizing companies to expand their R&D operations over time. Taxpayers can choose between the Regular Method or the Alternative Simplified Credit (ASC) Method.

The Regular Method

The Regular Method uses a fixed-base percentage and average gross receipts over the prior four years to determine a “base amount”. The credit is 15 percent of the current year’s Oregon QREs that exceed this base.

The calculation is expressed as follows:

Credit = 0.15 × (Current Oregon QREs – Base Amount)

Where the Base Amount is the product of the taxpayer’s fixed-base percentage and the average Oregon gross receipts for the four preceding tax years. For startups, the law typically prescribes a 3 percent fixed-base percentage for the first five years, which gradually phases into a calculation based on historical data. The base amount cannot be less than 50 percent of the current year’s QREs.

The Alternative Simplified Credit (ASC) Method

The ASC method is frequently preferred by companies that lack extensive historical sales records or those that have undergone significant structural changes. Under ASC, the credit is 14 percent of the current year’s Oregon QREs that exceed 50 percent of the average Oregon QREs for the three preceding tax years. If the taxpayer has no QREs in any of the three preceding years, the credit is 6 percent of the total current-year QREs.

The ASC election must be made on a timely filed original return on Schedule OR-RESEARCH and is generally irrevocable without the approval of the Department of Revenue.

Basic Research Payments

In addition to the standard credit for QREs, Oregon law provides a 15 percent credit for basic research payments made to Oregon universities or non-profit scientific research organizations. This follows the federal IRC § 41(e) structure, allowing companies to claim credits for fundamental research that may not yet be tied to a specific commercial business component but supports the broader advancement of semiconductor science.

Refundability and the Economic Incentive for Small Businesses

A unique and highly attractive feature of the Oregon semiconductor credit is its tiered refundability. While most corporate tax credits only offset existing tax liability, the Oregon credit allows smaller firms to receive a significant portion of the credit as a cash refund, providing vital liquidity to pre-revenue startups and expanding mid-sized enterprises.

The refundable portion is determined by the taxpayer’s Oregon employee count at the end of the tax year.

The non-refundable portion of the credit is first applied to the taxpayer’s regular tax liability, excluding the corporate minimum tax. However, the refundable portion can be used to satisfy the minimum tax under ORS 317.090, potentially reducing it to zero. Any unused non-refundable credit can be carried forward for up to five years.

Statutory Exclusions and Limitations

To maintain the integrity of the credit, both federal and state law specify several activities that do not qualify as research, regardless of whether they occur in a semiconductor facility.

Research After Commercial Production

Any research conducted after the business component has reached the stage of commercial production is ineligible. This includes activities like troubleshooting production equipment, debugging minor flaws that do not fundamentally change the component’s performance, or collecting data for quality control. However, if the company initiates a new project to improve the manufacturing process itself, that process is treated as a separate business component and may qualify.

Adaptation and Duplication

Research related to the adaptation of an existing business component to meet a specific customer’s requirement is excluded. This is common in “ASIC” (Application-Specific Integrated Circuit) design, where minor tweaks to a standard chip architecture for a specific client may not involve the resolution of technical uncertainty. Similarly, reverse-engineering or duplicating an existing product based on physical examination, blueprints, or publicly available information is prohibited.

Internal-Use Software (IUS)

Software developed solely for internal use—such as human resources, financial management, or general administrative systems—is subject to a higher standard for qualification. To qualify, IUS must be “innovative,” involve significant “economic risk,” and not be commercially available for purchase. In the semiconductor industry, internal software used for fabrication control or real-time wafer monitoring often meets these high thresholds due to its specialized nature and the technical complexity of integrating it with proprietary hardware.

Reporting and Documentation: The Role of Schedule OR-RESEARCH

Taxpayers claiming the credit must submit Schedule OR-RESEARCH (Form 150-102-130) with their Oregon tax return. This form acts as the bridge between the certification issued by Business Oregon and the final tax liability reported to the DOR.

Section G and Granular Reporting

Reflecting broader trends in federal enforcement, the 2024 and 2025 tax forms have introduced expanded reporting requirements. While Section G of Form 6765 remains optional for some federal filers through 2025, Oregon’s revenue office guidance signals a heightened interest in “business-component level” information.

Taxpayers are increasingly expected to document:

• A list of all business components associated with the credit claim.
• A brief description of the specific research activities performed for each component.
• Total qualified wage, supply, and contract research expenses allocated to each business component.

This level of detail requires semiconductor firms to align their project management tools (such as Jira or GitHub) with their accounting systems to ensure that engineering time is accurately captured and tied to the development of qualifying technological assets.

Comprehensive Industry Example: Silicon Forest Logic, Inc.

To illustrate the application of these rules, consider the case of Silicon Forest Logic, Inc. (SFL), a Portland-based firm specializing in high-performance analog-to-digital converters (ADCs) used in 5G telecommunications infrastructure.

Identifying the Business Components

In 2024, SFL launched two major research initiatives:

• Project Vector: The development of a new ADC architecture (the Product) intended to operate at twice the sampling rate of current chips while reducing power consumption by 30 percent.
• Project Flux: The development of a proprietary plasma-etching process (the Process) designed to increase the yield of these high-speed circuits on 300mm wafers.

Both Project Vector and Project Flux are identified as separate business components.

Navigating the Four-Part Test

For Project Vector, SFL faces significant technical uncertainty regarding the design of the circuit’s comparator stage. The engineers are unsure if the new architecture will maintain signal integrity at the target speeds. To resolve this, they conduct a process of experimentation involving 20 different layout iterations and exhaustive SPICE simulations (Hypothesis Testing). The work relies on electrical engineering and semiconductor physics (Technological in Nature).

For Project Flux, the uncertainty relates to the method of achieving uniform etching across the larger wafer surface. SFL performs systematic trial-and-error tests with different gas mixtures and RF power levels, analyzing wafer maps to evaluate the results.

Certification and Fees

SFL has 200 employees in Oregon. On October 1, 2024, the company submits its certification application to Business Oregon, paying the $3,000 fee. The application includes a detailed technical narrative explaining how Projects Vector and Flux support the state’s semiconductor cluster. SFL projects $10,000,000 in Oregon QREs for the year.

Calculating the Credit using ASC

SFL’s average Oregon QREs for the prior three years was $6,000,000.

• Base Amount: $6,000,000 × 0.50 = $3,000,000.
• Excess QREs: $10,000,000 – $3,000,000 = $7,000,000.
• Total Certified Credit: $7,000,000 × 0.14 = $980,000.

Refundability and Tax Impact

With 200 employees, SFL is in the 50% refundability tier.

• Refundable Portion: $980,000 × 0.50 = $490,000.
• Non-Refundable Portion: $490,000.

SFL files its Oregon return and Schedule OR-RESEARCH. It owes $200,000 in corporate excise tax.

1. The $490,000 non-refundable portion is applied first, reducing the $200,000 liability to zero.
2. The remaining $290,000 of the non-refundable portion is carried forward to 2025.
3. The $490,000 refundable portion is paid out as a cash refund (after potentially offsetting any other state debts).

The Impact of Federal Law Changes: OBBBA and Section 174

A critical second-order insight involves the interaction between the Oregon credit and the federal “One Big Beautiful Bill Act” (OBBBA), signed on July 4, 2025. For several years, federal law required companies to amortize R&D expenses under Section 174 over five years, which significantly increased the immediate tax burden on innovation-heavy semiconductor firms.

OBBBA permanently restored the ability to immediately expense domestic R&D costs. Furthermore, for eligible small businesses (those with average annual gross receipts of $31 million or less), the law allows for retroactive expensing of costs incurred in 2022-2024 via amended returns. This federal change directly influences the Oregon credit’s utility; as companies amend their federal returns to capture these deductions, they may also see changes in their historical QRE bases, potentially increasing the “excess” amount eligible for the Oregon credit in current and future years.

Audit Defense and Contemporaneous Documentation

The Oregon Department of Revenue and the IRS have signaled a heightened period of scrutiny for R&D claims, particularly focusing on the “business component” and “process of experimentation” tests. In many recent Tax Court rulings, claims have been denied not because the research wasn’t happening, but because the documentation failed to tie specific engineering activities to discrete business components.

To ensure “audit readiness,” Oregon semiconductor companies must maintain a comprehensive evidence trail:

• Payroll Records: Time-tracking data that distinguishes between qualified research, direct supervision, and non-qualified administrative tasks.
• Technical Documentation: Project plans, laboratory notebooks, logic design specifications, and white papers describing the technical uncertainties at the project’s start.
• Experimental Evidence: Simulation results, test logs, failure analysis reports, and photographs of prototypes or wafer samples.
• Financial Substantiation: General ledger details and invoices for supplies consumed in research and payments to third-party contractors.

Strategic Implications and Future Outlook

The Oregon semiconductor R&D credit is more than a simple tax break; it is a structural incentive designed to cement Oregon’s position as the premier location for high-complexity chip development in the United States. By focusing on the “business component,” the state has created a framework that rewards true innovation over routine engineering.

The $80 million biennium cap and the competitive certification process suggest that Oregon is prioritizing quality and industry-specific nexus. As the industry moves toward 2nm nodes and integrates artificial intelligence into EDA tools, the technical boundaries of what constitutes a “business component” will continue to evolve. Companies that adopt sophisticated, component-level tracking systems today will not only maximize their current tax benefits but also build the institutional memory necessary to sustain innovation through the credit’s current sunset in 2029.

Ultimately, the meaning of “business component” in the Oregon context is synonymous with the discrete units of intellectual property that define a company’s competitive advantage. Whether it is a physical wafer, a proprietary etching technique, or an advanced design software, the successful identification and documentation of these components is the key to unlocking millions of dollars in state-level fiscal support.